Publications
SCGPSim: A Fast SystemC Simulator on GPUs, Nanjundappa, Mahesh Patel, Hiren Jose, Bijoy A Shukla, Sandeep (2010), in: 15th Asia and South Pacific Design Automation Conference
A Methodology for Power-Aware High-Level Synthesis of Co-processors from Software Algorithms, Ahuja, Sumit Zhang, Wei Shukla, Sandeep, in: 23rd International Conference on VLSI Design, pages --, IEEE, 2010.
Power estimation methodology for a high-level synthesis framework, Ahuja, Sumit Mathaikutty, Deepak Singh, Gaurav Dingankar, Ajit Shukla, Sandeep, in: 10th International Symposium on Quality Electronic Design, pages 541-546, IEEE, 2009.
Hardware Coprocessor Synthesis from an ANSI C Specification, Ahuja, Sumit Gurumani, Swathi Spackman, Chad Shukla, Sandeep, in: IEEE Design and Test of Computers, pages 58-67, IEEE, 2009.
Statistical Regression Based Power Models for Co-processors for Faster and Accurate Power Estimation, Ahuja, Sumit Mathaikutty, Deepak Shukla, Sandeep (2009), in: IEEE International SOC Conference
MCBCG: Model Checking Based Sequential Clock-Gating, Ahuja, Sumit Shukla, Sandeep, in: High Level Design Validation and Test, pages --, IEEE, 2009.
Verification Methodologies to Facilitate Aggressive Power Reduction, Ahuja, Sumit Shukla, Sandeep, in: Microprocessor Test and Verification (MTV),, pages --, IEEE, 2009.
Bibliography not yet implemented for publication type: Incollection.
Verifying Compiler Based Refinement of BluespecTM Specifications Using the SPIN Model Checker, Singh, Gaurav Shukla, Sandeep, in: SPIN '08: Proceedings of the 15th international workshop on Model Checking Software, pages 250--269, Springer-Verlag, 2008.
MCF: a metamodeling-based component composition framework-composing SystemC IPs for executable system models, Mathaikutty, Deepak Shukla, Sandeep (2008), in: IEEE Trans. Very Large Scale Integr. Syst., 16:7
Ingredients for Successful System Level Design Methodology, Patel, Hiren Shukla, Sandeep, Springer Publishing Company, Incorporated, 2008.
Dataflow Architectures for GALS, Suhaib, Syed Mathaikutty, Deepak Shukla, Sandeep (2008), in: Electron. Notes Theor. Comput. Sci., 200:1
Applying Verification Collaterals for Accurate Power Estimation, Ahuja, Sumit Mathaikutty, Deepak Shukla, Sandeep, in: 9th International Workshop on Microprocessor Test and Verification, pages 61-66, IEEE, 2008.
Model-driven validation of SystemC designs, Patel, Hiren Shukla, Sandeep, in: DAC '07: Proceedings of the 44th annual conference on Design automation, pages 29--34, ACM, 2007.
Guest Editors' Introduction: GALS Design and Validation, Kishinevsky, Mike Shukla, Sandeep Stevens, Kenneth S. (2007), in: IEEE Des. Test, 24:5
Local Causal Reasoning of a Safety-Critical Subway System, Daylight, Edgar G. Shukla, Sandeep, in: MEMOCODE '07: Proceedings of the 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign, pages 83--84, IEEE Computer Society, 2007.
Type Inference for IP Composition, Mathaikutty, Deepak Shukla, Sandeep, in: MEMOCODE '07: Proceedings of the 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign, pages 61--70, IEEE Computer Society, 2007.
Design fault directed test generation for microprocessor validation, Mathaikutty, Deepak Shukla, Sandeep Kodakara, Sreekumar V. Lilja, David Dingankar, Ajit, in: DATE '07: Proceedings of the conference on Design, automation and test in Europe, pages 761--766, EDA Consortium, 2007.
Tackling an abstraction gap: co-simulating SystemC DE with bluespec ESL, Patel, Hiren Shukla, Sandeep, in: DATE '07: Proceedings of the conference on Design, automation and test in Europe, pages 279--284, EDA Consortium, 2007.
Assertion-Based Modal Power Estimation, Ahuja, Sumit Mathaikutty, Deepak Shukla, Sandeep Dingankar, Ajit, in: MTV '07: Proceedings of the 2007 Eighth International Workshop on Microprocessor Test and Verification, pages 3--7, IEEE Computer Society, 2007.
EWD: A metamodeling driven customizable multi-MoC system modeling framework, Mathaikutty, Deepak Patel, Hiren Shukla, Sandeep Jantsch, Axel (2007), in: ACM Trans. Des. Autom. Electron. Syst., 12:3
VT Matrix Multiply Design for MEMOCODE '07, Simpson, Eric Yu, Pengyuan Schaumont, Patrick Ahuja, Sumit Shukla, Sandeep, in: MEMOCODE '07: Proceedings of the 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign, pages 95--96, IEEE Computer Society, 2007.
Tackling an abstraction gap: co-simulating SystemC DE with bluespec ESL, Patel, Hiren Shukla, Sandeep, in: DATE '07: Proceedings of the conference on Design, automation and test in Europe, pages 279--284, EDA Consortium, 2007.
Model Based Test Generation for Microprocessor Architecture Validation, Kodakara, Sreekumar V. Mathaikutty, Deepak Dingankar, Ajit Shukla, Sandeep Lilja, David, in: VLSID '07: Proceedings of the 20th International Conference on VLSI Design held jointly with 6th International Conference, pages 465--472, IEEE Computer Society, 2007.
Scalable techniques and tools for reliability analysis of large circuits, Bhaduri, Debayan Shukla, Sandeep Graham, Paul Gokhale, Maya, in: VLSID '07: Proceedings of the 20th International Conference on VLSI Design held jointly with 6th International Conference, pages 705--710, IEEE Computer Society, 2007.
Model Checking Bluespec Specified Hardware Designs, Singh, Gaurav Shukla, Sandeep, in: MTV '07: Proceedings of the 2007 Eighth International Workshop on Microprocessor Test and Verification, pages 39--43, IEEE Computer Society, 2007.
Model-driven test generation for system level validation, Mathaikutty, Deepak Ahuja, Sumit Shukla, Sandeep (2007), in: High Level Design Validation and Test Workshop, 2007
Techniques for Power-aware Hardware Synthesis from Concurrent Action Oriented Specifications, Singh, Gaurav Ahuja, Sumit Shukla, Sandeep, in: Journal of Low Power Electronics (JOLPE), pages 156-166, JOLPE, 2007.
Low-power hardware synthesis from TRS-based specifications, Singh, Gaurav Shukla, Sandeep, in: , pages 49-58, , 2006.
Deep vs. Shallow, Kernel vs. Language--What is Better for Heterogeneous Modeling in SystemC?, Patel, Hiren Shukla, Sandeep, in: MTV '06: Proceedings of the Seventh International Workshop on Microprocessor Test and Verification, pages 68--75, IEEE Computer Society, 2006.
Guest Editors' Introduction: The True State of the Art of ESL Design, Shukla, Sandeep Pixley, Carl Smith, Gary (2006), in: IEEE Des. Test, 23:5
Heterogeneous behavioral hierarchy for system level designs, Patel, Hiren Shukla, Sandeep Bergamaschi, Reinaldo A., in: DATE '06: Proceedings of the conference on Design, automation and test in Europe, pages 565--570, European Design and Automation Association, 2006.
Special issue on formal methods for globally asynchronous and locally synchronous (GALS) systems, Shukla, Sandeep Theobald, Michael (2006), in: Form. Methods Syst. Des., 28:2
A rule-based model of computation for SystemC: integrating SystemC and Bluespec for co-design, Patel, Hiren Shukla, Sandeep Mednick, E. Nikhil, R. S., in: , pages 39-48, , 2006.
A hybrid framework for design and analysis of fault-tolerant architectures, Bhaduri, Debayan Shukla, Sandeep Coker, Deji Taylor, Valerie Graham, Paul Gokhale, Maya, in: DATE '06: Proceedings of the conference on Design, automation and test in Europe, pages 335--336, European Design and Automation Association, 2006.
Design with race-free hardware semantics, Schaumont, Patrick Shukla, Sandeep Verbauwhede, Ingrid, in: DATE '06: Proceedings of the conference on Design, automation and test in Europe, pages 571--576, European Design and Automation Association, 2006.
Stochastic learning feedback hybrid automata for dynamic power management in embedded systems, Erbes, Teodora Shukla, Sandeep Kachroo, Pushkin, in: , pages 208-213, , 2005.
XFM: An incremental methodology for developing formal models, Suhaib, Syed M. Mathaikutty, Deepak Shukla, Sandeep Berner, David (2005), in: ACM Trans. Des. Autom. Electron. Syst., 10:4
Design Issues in Embedded Systems, Patel, Hiren Gupta, Rajesh Shukla, Sandeep S. Gupta, CRC Press, 2005.
XFM: An incremental methodology for developing formal models, Suhaib, Syed M. Mathaikutty, Deepak Shukla, Sandeep Berner, David (2005), in: ACM Trans. Des. Autom. Electron. Syst., 10:4
NANOLAB-a tool for evaluating reliability of defect-tolerant nanoarchitectures, Shukla, Sandeep Bhaduri, Debayan (2005), in: Nanotechnology, IEEE Transactions on, 4:4
Nano, quantum and molecular computing: implications to high level design and validation, Shukla, Sandeep Bahar, R. Iris, Kluwer Academic Publishers, Norwell, MA, USA, 2004.
SystemC Kernel Extensions For Heterogenous System Modeling: A Framework for Multi-MoC Modeling & Simulation, Patel, Hiren Shukla, Sandeep, Kluwer Academic Publishers, Norwell, MA, USA, 2004.
Evaluating the Reliability of Defect-Tolerant Architectures for Nanotechnology with Probabilistic Model Checking, Norman, Gethin Parker, David Kwiatkowska, Marta Shukla, Sandeep, in: VLSID '04: Proceedings of the 17th International Conference on VLSI Design, pages 907, IEEE Computer Society, 2004.
Nanolab: a tool for evaluating reliability of defect-tolerant nano architectures, Shukla, Sandeep Bhaduri, Debayan, in: , pages 25-31, , 2004.
NANOPRISM: a tool for evaluating granularity vs. reliability trade-offs in nano architectures, Bhaduri, Debayan Shukla, Sandeep, in: GLSVLSI '04: Proceedings of the 14th ACM Great Lakes symposium on VLSI, pages 109--112, ACM, 2004.
Truly heterogeneous modeling with systemC, Patel, Hiren Shukla, Sandeep (2004), in:
Structural component composition for system-level models, Doucet, Frederic Shukla, Sandeep Gupta, Rajesh (2004), in:
A survey of networked embedded systems: An introduction, Patel, Hiren S. Gupta Shukla, Sandeep Gupta, Rajesh, CRC Press, 2004.
Scheduling the Scheduler: Efficient Simulation of Synthesizable Design Revisited, S. Agrawal Shukla, Sandeep, Kluwer Academic Publishers, 2004.
Modular design through component abstraction, Berner, David Talpin, Jean-Pierre Le Geurnic, Paul Shukla, Sandeep, in: CASES '04: Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems, pages 202--211, ACM, 2004.
Extreme Formal Modeling (XFM) for Hardware Models, Suhaib, Syed Mathaikutty, Deepak Shukla, Sandeep Berner, David, in: MTV '04: Proceedings of the Fifth International Workshop on Microprocessor Test and Verification, pages 30--35, IEEE Computer Society, 2004.
Towards a heterogeneous simulation kernel for system level models: a SystemC kernel for synchronous data flow models, Patel, Hiren Shukla, Sandeep, in: GLSVLSI '04: Proceedings of the 14th ACM Great Lakes symposium on VLSI, pages 248--253, ACM, 2004.
Modeling and Validating Globally Asynchronous Design in Synchronous Frameworks, Mousavi, Mohammad Reza Le Geurnic, Paul Talpin, Jean-Pierre Shukla, Sandeep Basten, Twan, in: DATE '04: Proceedings of the conference on Design, automation and test in Europe, pages 10384, IEEE Computer Society, 2004.
Towards A Heterogeneous Simulation Kernel for System Level Models: A SystemC Kernel for Synchronous Data Flow Models, Patel, Hiren Shukla, Sandeep, 2004.
A Behavioral Type Inference System for Compositional System-on-Chip Design, , in: ACSD '04: Proceedings of the Fourth International Conference on Application of Concurrency to System Design, pages 47, IEEE Computer Society, 2004.
Formal methods and models for system design: a system level perspective, Gupta, Rajesh Le Geurnic, Paul Shukla, Sandeep Talpin, Jean-Pierre, Kluwer Academic Publishers, Norwell, MA, USA, 2004.
Tools and techniques for evaluating reliability trade-offs for NANO-architectures, Bhaduri, Debayan Shukla, Sandeep (2004), in:
Reliability analysis in the presence of signal noise for nano architectures, Bhaduri, Debayan Shukla, Sandeep, 2004.
Reliability evaluation of multiplexing based defect-tolerant majority circuits, Bhaduri, Debayan Shukla, Sandeep, 2004.
Effects of property ordering in an incremental formal modeling methodology, Suhaib, Syed Mathaikutty, Deepak Shukla, Sandeep, in: HLDVT '04: Proceedings of the High-Level Design Validation and Test Workshop, 2004. Ninth IEEE International, pages 89--94, IEEE Computer Society, 2004.
Coordinated parallelizing compiler optimizations and high-level synthesis, Gupta, Sumit Gupta, Rajesh Dutt, Nikil Nicolau, Alex (2004), in: ACM Trans. Des. Autom. Electron. Syst., 9:4
Online strategies for dynamic power management in systems with multiple power-saving states, Irani, Sandy Shukla, Sandeep Gupta, Rajesh (2003), in: Trans. on Embedded Computing Sys., 2:3
Polychrony for Formal Refinement-Checking in a System-Level Design Methodology, Talpin, Jean-Pierre Le Geurnic, Paul Shukla, Sandeep Gupta, Rajesh Doucet, Frederic, in: ACSD '03: Proceedings of the Third International Conference on Application of Concurrency to System Design, pages 9, IEEE Computer Society, 2003.
Formal Methods for Dynamic Power Management, Gupta, Rajesh Irani, Sandy Shukla, Sandeep, in: ICCAD '03: Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design, pages 874, IEEE Computer Society, 2003.
First International Workshop on Formal Methods for Globally Asynchronous and Locally Synchronous Designs, Shukla, Sandeep Talpin, Jean-Pierre, INRIA, 2003.
First ACM/IEEE International Conference on Formal Methods and Models for Codesign, Shukla, Sandeep Talpin, Pierre, IEEE Computer Society Press, 2003.
A Model-Based Approach to System Specification for Distributed Real-time and Embedded Systems, Cornea, Radu Mohapatra, Shivajit Dutt, Nikil Gupta, Rajesh Kreuger, Ingolf Nicolau, Alex Schmidt, Doug Shukla, Sandeep Venkatasubramanian, Nalini, 2003.
Service FORGEA QoS and Power Management Service Based Software Architecture, Cornea, Radu Mohapatra, Shivajit Dutt, Nikil Gupta, Rajesh Nicolau, Alex Shukla, Sandeep Venkatasubramanian, Nalini, 2003.
A Model Based Approach to System Specification for Distributed Real-Time and Embedded Systems, Cornea, Radu Mohapatra, Shivajit Dutt, Nikil Gupta, Rajesh Kreuger, Ingolf Nicolau, Alex Schmidt, Doug Shukla, Sandeep Venkatasubramanian, Nalini, 2003.
Polychrony for System Level Design, Talpin, Jean-Pierre Le Geurnic, Paul Shukla, Sandeep Gupta, Rajesh Doucet, Frederic, 2003.
Algorithms for power savings, Irani, Sandy Shukla, Sandeep Gupta, Rajesh, in: SODA '03: Proceedings of the fourteenth annual ACM-SIAM symposium on Discrete algorithms, pages 37--46, Society for Industrial and Applied Mathematics, 2003.
An Environment for Dynamic Component Composition for Efficient Co-Design, Doucet, Frederic Shukla, Sandeep Gupta, Rajesh Otsuka, M., in: DATE '02: Proceedings of the conference on Design, automation and test in Europe, pages 736, IEEE Computer Society, 2002.
Interoperability as a Design Issue in C++ Based Modeling Environments, Doucet, Frederic Gupta, Rajesh Otsuka, M. Shukla, Sandeep, pages 87-92IEEE Computer Society Press, 2001.
A New Heuristic for Bad Cycle Detection Using BDDs, Hardin, R. H. Kurshan, Robert P. Shukla, Sandeep Vardi, M. Y. (2001), in: Form. Methods Syst. Des., 18:2
A Simulation and Validation Tool for Self-Stabilizing Systems, Shukla, Sandeep D. J. Rosenkrantz Ravi, S. S. (1997), in: DIMACS Series in Discrete Mathematics and Theoretical Computer Science, 32
A HORNSAT Based Approach to the Polynomial Time Decidability of Simulation Relations for Finite State Processes, Shukla, Sandeep D. J. Rosenkrantz Hunt III, H.B. Stearns, R. E. (1997), in: DIMACS Series in Discrete Mathematics and Theoretical Computer Science, American Mathematical Society, 35
HORNSAT, Model Checking, Verification, and Games, Shukla, Sandeep (1995).
Using quantum model of computation for reliability evaluation of defect tolerant nano-architectures, Bhaduri, Debayan Shukla, Sandeep, .
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Recent News
2009-02-05:
Publications Update
An initial commit of the publication display function has been made
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One Step Closer to Publications
After adding an item to the Fermatian editor allowing the user to select their Aigaion ID, we are now one step closer to having a full list of publications on each Fermatians personal page.
2009-01-27:
Aigaion Update
All backend functionality has bee updated to work with Aiagion.